PHY 233 Final, Spring 2011

Va Spring 2010 Ce PHY 233 Final Note: You may save time by answering parts of Q’s: 1, 2,3, 4, 5 on the question sheet itself. The figure shows two sequences and the beginning of a timing diagram. The first coloumn shows the initial state of the two systems. Continue the diagram for at least 8 cycles of the clock. Do you observe a vicious cycle? (10 pts.) The figure shows a simple Asynchronous State machine, a State Transition Diagram, and two maps (M1 and M2). aol a. Calculate (X) and record it in the map Mj. (2 pts.) viNoo oi te b. Identify the stable states on the map M,. (3 pts.) m ts i c. Show the state assignment (a to g) on M2 (4 pts.) vat 0001 11 10 (:.) Show (AB) on the arrows wherever appropriate (3 pts.) ». \ Can there be racing? Can this ASM be used? (3 pts.) \. 3. The figure shows a state transition diagram and a partially b filled Iinplication chart. c a. Explain why are 14 of the 21 cells crossed out? (2 pts.) dip b. Fill the blank cells and identify the redundant state(s) (5 pts.) CWE c. Redraw the minimized state diagram (3 pts.) f Ohate the operation performed by the ASM. (2 pts.) SL es The figure shows two 3x2 Multiplication blocks used to construct a 3x4 block. a. Show how the inputs are connected to the multiplication blocks (4 pts.) fafihy 72 Eiofit b. Indicate the number of bits on each slash sign marked by (?) (3 pts.) px A . . (3x2 c. Draw the details of the 3x2 block. Do NOT forget to include (5 pts.) t { | the correct carry in. Yes, you should have done the HW. Kat t = 0 we have Q =1. Continue the timing diagram for 5 cycles. Note that the input J is not connected. (8 pts.) Answer 8 of the following 13 questions. The 9" answer will be ignored. (8x5.5 = 44 pts.) GBB Bo press Cc Evaluate the output of the adder in terms of A&B. U, 0; O, 8, 0, Ovhy is the C pin added to the output? bs) Why is the power dissipated in a chip proportional to its speed? Ri x. Write a Register Transfer Language statement for the Adder circuit shown. @) In which situation would one use an SAR and rather than a Continuous ADC? A Identify the two gates that the NAND chip is simulating in the figure. ® a tae a. @) COwny is serial asynchronous data preceded by a “1”? <= () Identify the chip constructed of Transmission gates. ‘®) When is an Associative Memory useful? xy i. Why is the branching shown on x*y* unwise? OOOE In sequential computation, why can loading the length of the numbers be optional? () Identify the segment that looks like 3 highway lanes. What do the indices m & n refer to? k What is the algorithm of the Boozer ? No points for saying: Find booze, drink booze... wa? Poet give Me pulse in. Identify the circuit shown. Why is it essentially an ASM? cl a Good Luck! 10+15+2x12+8+44 = 10] Bouus: What would be the greatest practical difficulty in constructing an ASM by Logic Works?