EECE 320 Exam, Fall 2005

A. CHEHAB DEPARTMENT OF ELECTRICAL AND COMPUTER EGINEERING M. MANSOUR AMERICAN UNIVERSITY OF BEIRUT FALL TERM 2005-2006 MIDTERM I EECE320 - DIGITAL SYTEMS DESIGN NOVEMBER 24, 2005 UNAMEU: _____________________ ID: _____________________ UCOURSE SECTIONU: SECTION 1 (PROF. CHEHAB) SECTIONS 2 & 3 (PROF. MANSOUR) INSTRUCTIONS: o BE AS NEAT AND CLEAR AS POSSIBLE. o THE SCRATCH BOOKLET UWILL NOTU BE CONSIDERED IN GRADING. o PROVIDE YOUR ANSWERS IN THE SPACE PROVIDED ON THE QUESTION SHEET. o INDICATE THE SECTION YOU ARE REGISTERED IN. o WRITE YOUR NAME AND ID NUMBER IN THE SPACE PROVIDED ABOVE. o CALCULATORS ARE NOT ALLOWED. o THE EXAM IS CLOSED BOOK/CLOSED NOTES. THE DURATION IS U1.5 HOURSU. Problem Total Points Earned Points 1 6 2 6 3 6 4 6 5 8 6 8 7 12 8 16 9 12 10 10 11 10 Total 100 Page 1 of 11 UProblem 1U: [6 points] Find the base b in the case where: (859)B10 B = (5B7)Bb B B = __________ UProblem 2U: [6 points] Perform the operation 87 – 99 in two’s complement representation using 8 bits. UProblem 3U: [6 points] Find the radix complement and the diminished radix complement for the number (4723)B8 B. Radix complement = _________________ Diminished radix complement = ___________ UProblem 4U: [6 points] How many minterms are included in the following 4-variable function and what are they? F(A,B,C,D) = ( (A+B)’ + (C+D)’ )’ The minterms are: __________________________________________________________ _________________________________________________________________________ Page 2 of 11 UProblem 5U: [8 points] Consider the function: F = A’B’C’D’ + A’B’C’D + A’B’CD + A’B’CD’ + A’BCD’+ ABC’D + ABCD’ + AB’C’D’ +AB’CD’ CD AB 00 01 11 10 00 01 11 10 a) Mark the distinguished-1 cells on the map. b) What is a minimum SOP expression for F? _______________________________________________ UProblem 6U: [8 points] Draw the gate implementation of the expression F = (XB1 B+XB2 B’)(XB2 B+XB3 B) a) What type of hazard is possible with this implementation? ________________________________ b) Indicate which transition causes such hazard _________________________________ c) How do you modify the implementation to obtain a hazard-free circuit? Page 3 of 11 UProblem 7U: [12 points] Design a circuit to convert from BCD to EXCESS-3 representation. Start by filling out the truth table, then fill the K-maps, then minimize the expressions for E3, E2, E1, and E0. B3 B2 B1 B0 E3 E2 E1 E0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1 0 0 0 1 0 0 1 B1B0 B3B2 00 01 11 10 00 01 11 10 B1B0 B3B2 00 01 11 10 00 01 11 10 E3 = ______________________________ E2 = ______________________________ B1B0 B3B2 00 01 11 10 00 01 11 10 B1B0 B3B2 00 01 11 10 00 01 11 10 E1 = ______________________________ E0 = ______________________________ Page 4 of 11 UProblem 8U: [16 points] Write a VHDL entity and behavioral architecture for a circuit that perform the conversion indicated in the previous problem. The circuit has inputs (B3, B2, B1, B0) and outputs (E3, E2, E1, E0). In addition, it has an active-low enable signal (EN_L). Then, write a testbench to the test your circuit with the following combinations: EN_L = 1, B3B2B1B0 = 0110 EN_L = 0, B3B2B1B0 = 0111 EN_L = 0, B3B2B1B0 = 1000 EN_L = 0, B3B2B1B0 = 1001 Page 5 of 11 Page 6 of 11 UProblem 9U: Binary Sorting [12 points] Let A=aB1 BaB0 B and B=bB1 BbB0 B be two unsigned 2-bit binary numbers. a) Design a logic circuit that sorts the two inputs, putting the maximum at the top output and the minimum at the bottom output, i.e., MX=mxB1 BmxB0 B=max(A,B), and MN= mnB1 BmnB0 B=min(A,B). Write down Boolean equations and draw the logic diagram. b1b0 a1a0 00 01 11 10 00 01 11 10 b1b0 a1a0 00 01 11 10 00 01 11 10 b1b0 a1a0 00 01 11 10 00 01 11 10 b1b0 a1a0 00 01 11 10 00 01 11 10 Page 7 of 11 (Problem 9(a) cont’d) Page 8 of 11 b) Using the block that you designed in part a), design a logic circuit that sorts four unsigned 2-bit binary numbers A=aB1 BaB0 B, B=bB1 BbB0 B, C=cB1 BcB0 B, D=dB1 BdB0 Bin descending order, putting the maximum at the top and the minimum at the bottom, i.e., MAX ≥ M3 ≥ M2 ≥ MIN. Label all connections clearly. Page 9 of 11 UProblem 10U: Multiplexer function [10 points] What Boolean function F(A,B,C,D) does the following circuit implement? Write your answer as a canonical POS expression. F = ____________________________________________________________________________ Page 10 of 11 UProblem 11U: 4-to-16 Decoder [10 points] In this problem, you are asked to design a 4-to-16 decoder with enable as shown below. You have available Uonly twoU 2-to-4 decoders with enable and Uactive-lowU outputs, and a set of NOR gates. Show how to design the 4-to-16 decoder using two 2-to-4 decoders and NOR gates. Label all your connections clearly. Page 11 of 11