EECE 320 Midterm with Solution, Summer 2010
American University of Beirut · Digital Systems Design · 9 pages · Prof. Ali Chehab · with solution
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A. CHEHAB FACULTY OF ENGINEERING AND ARCHITECTURE
_M. MANSOUR AMERICAN UNIVERSITY OF BEIRUT
SUMMER 2010
MIDTERM
DIGITAL SYTEMS DESIGN (EECE320)
July 19, 2010
NAME: “ace fad ID: a
CLOSED BOOK (90 MINUTES)
CIRCLE THE NAME OF YOUR INSTRUCTOR
WRITE YOUR NAME AND ID NUMBER IN THE SPACE PROVIDED ABOVE.
CALCULATORS ARE NOT ALLOWED.
PROVIDE YOUR ANSWERS IN THE SPACE PROVIDED ON THE QUESTION SHEET.
THE SCRATCH BOOKLET WILL NOT BE CONSIDERED IN GRADING.
BE AS NEAT AND CLEAR AS POSSIBLE.
GOOD LUCK!
Total Points Earned Points
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EECE 320 ‘4 2/8
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Problem 1 (20 points)
a) The 10’s complement of the decimal number 84091239 is: 16301
b) Represent the following decimal numbgrs using two’s complement with just enough bits:
-21=( dAoto4
c) Convert the following binary number to Yctal and to Hexadecimal:
211011101010.00} 10% (_ 3353.41 ds
21191119}010.00110 = ( 4E A hs
d) Convert the hexadecimal number 7CE3B to Octal: 4 +
Answer: 4g
2 AY J ;
f) LiF MAG
The decimal value of the unsigned binary number 1 01110.0111 is: ie)
e) What is the minimum number of bjs required to represent a binary code havin 7 codewords?
g) Use DeMorgan’s theorem to complement the followfig expression: F = X’ Y’(Z+W) + X(Y+W)
; cp
Answer: £ = (x aY s7w ).0% 4 / yl) z
7 x
h)’ What is the IT representation of F = }wxy,2(1,9,13,14)?
f
ieee ead i“ - >. | yz. F . , a .
Answer: Th vee {O, ay 4, a 1,24 4A AoA >» /es <?)
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i) \ The maximum decimal value
which a 3-digit, base-b adder can add is 124,19). What is the
value of b?
Vv
j) The decimal number 753 is represented in Excess code as: A A odtoo
io 8&E
Ooo}, CeO face lio
The base b =
EECE 320 MIDTERM 3/8
Problem 2 (4 points)
Given F(A,B,C,D) = AB + A’C+D, express F as a product of MAXTERMS.
(Prin (Bec) 40 = /Dime\(b Bik
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C+ ae)
Problem 3 (6 points) = -¢ Dis C{C Ls
(O+h+€ ] fO 2 RETIN’ )
Write the Boolean expression of the following circuit and reduce it using Boolean algebra. The
expression should contain only AND, OR and NOT operati aS
X=
Problem(4\6 points)
Convert the following circuit into a circuit consisting of NAND and NOT gates only.
<C4 8! )( D+ LACK OH Wc
Bs
EECE 320 MIDTERM
Use the Karnaugh map to obtain a minimum SOP expression of the following logic function:
Problem § (6 points)
Olo1 OoW
F = agen (0, 5, 10, 15) + Zd (3, 8,13) Viol
Joo 1000
‘man ;
C ~\
01 44110.
+ A'B
Problem 6 (8 points)
Consider the function: F = Zap.cp(0, 1, 2, 4, 5, 6, 7, 9, 11, 12, 13, 14)
a) What are the essential prime implicants of F?
wy \! ? n MS A AS De = a
b) What are the other prime implicants of F?
Be Alcp’ peo’
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Problem 7 (8 points)
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4/8
For the following logic expression (F), indicate all the transitions that cause a static hazard in the
corresponding two-level AND-OR circuit, and suggest a new expression for a hazard-free circuit
that realizes the same logic function.
F=W’.X+Y'.Z+W.X.Y.Z+X YZ
Transitions causing hazards are:
oA We, AAI, A101%
d yeoved ex oye rs
Ji, < -
Hazard-Free F=_\\J yy ag 4 WR 2
10°
01 44
a
IXY?
Sw Yel ee fea Wh!
v
z
Y/Y
EECE 320 MIDTERM O1D 5/8
Vol boo ago re
ABC FAB YRC) AC ,
if
Problem 8 (8 points)
Implement the function F = AB’ + BC’ using a 3-to-8 decoder (with additional gates). Implement it
also using an 8-input multiplexer. Assume that A is the most significant bit.
Problem 9 (6 points)
A half-adder adds only two bits (A and B, without carry-in) and produces two outputs, the sum (S)
and carry (C). Find the expressions of S and C in terms of A and B and then implement the
following four functions using three half adders. You have to show the inputs that are connected to
each half adder and what are the outputs of the adders. S ~ & xok g 9 & er €
D=A@BO@C E=A’BC+AB’C F = ABC’ +(A’+B’)C G=ABC
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EECE 320 MIDTERM. 6/8
Problem(19 (6 points)
Implement the following function using the PAL4L6 shown below.
( ;
FI =(A’ +B’ +OA+C opps Pa
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EECE 320 MIDTERM 118
Problem 11 (12 points)
Design a circuit to increment a 3-bit binary number in bit-reversed order. The inputs are BO, B1
and B2, where B2 is the most significant digit and the outputs are Co, C1 and C2 where C2 is the
most significant digit. The operation of this circuit is given by CzC;Cp = BoB; Bz + 001.
(i) Show a truth table for the circuit.
(ii) Draw Karnaugh maps for each output and use them to simplify the functions.
(iii) Draw a schematic diagram using the minimum number of NAND gates and inverters only.
Bi
Oo
BO
oO 9 a
B2
2)
ig Ol wet !
a al t “~ te) i t oy
oo 1 N { ee oY
moto ’ ' 5 7 ys Co
roa t ! u fal e? 3 ‘ a —_—
\ Qu | §
B2B1 B2B1 ~< 261 /
Bo 00 O01 11 10 Bo 00 01 11 10 Bo 00 on tt 10
0 IX | Oo} X}
the} x |/ fx [A *
Sc Ci
ae 7 4
a nn ,~ BBs
VF
EECE 320 MIDTERM _ 8/8
Problem 12 (10 points) 1} °
Write a VHDL entity and architecture to implement a 2-4 decoder with enable using th behavioral J
style. The decoder has an active-high enable signal (EN). Then, write a testbench to the test the
decoder with 5 cases, one with enable low and 4 with enable high checking the 4 possibilities of the
input lines.
Py y
entity Pe ee OS
cit
i