CMPS 255 Final, Fall 2002

January 28, 2003 CMPS 255 Final Exam American University of Beirut CMPS 255 Final Exam January 28, 2003 2 hour exam ERICAN CNIVERSIT. LIBRARY or 6 BU ee Student Name: Student ID: Signature: * There are ten pages, including this one. The test is out of 100 marks, and the value of each question is provided. Please use this information to manage your time effectively, * Your handwriting should be neat and readable OR | WILL NOT MARK THE ANSWER! -{,. Question 1: /10 ‘Question 2: ~ #10 Question 3: es 10 ky Question 4:___— 30s a Question 5: “Foe. ; Question 6: __ /10 Question 7: 410 Question 8: /10 __/100 Instructor: MAM! R. karan , ‘ , January 28, 2003 Y CMPS 255 Final Exam de up mE Taya eee ee Question |: Multiple Choice [!0 points] True or false? No explanation required. Each correct answer is worth | points, but | point will be subtracted for each wrong answer, so answer only if you are reasonably certain. 1-T F The SPARC architecture is big-endian, but the Pentium is little-endian. 2-T F A big-endian file needs to be “byte swapped” before using it on a different archi- tecture (or equivalently, the program needs to know the format of the file and work with it as appropriate for the big/little-endian format.) 3-T F _ Multi-byte words are stored as a sequence of bytes, in which the address of the multi-byte word is the same as the byte of the word that has the lowest address. 4-T F The “control section” of the CPU interprets instructions and effects register transfers. 5-T F The ARC datapath is made up of the register file and the ALU. 6- T F Subroutine linkage with a data link area passes parameters in registers. 7-T F = Subroutine linkage with a stack passes parameters in a separate area in memory. 8- T Fs Asimple register is a register that consists of flip-flops and external gates. 9-T F singeneral, a shift register is capable of shifting its scored bits laterally only in one direction. 10-T — F Simultaneous loading of bits into a register is not done with a common clock pulse. 2/12 Instructor: Marcel R. kavam January 28, 2003 CMPS 255 Final Exam Question 2: Bubble Logic [10 points] Convert the following logic circuit into a circuit that consists of NOR gates and inverters, using the bubble logic. Instructor: Marcel R. karam 3/12 January 28, 2003 CMPS 255 Final Exam Question 3: Control Unit in SPARC CPU [10 points] Name the five steps that the control unit carries out in executing a program, and describe briefly the role of the Decode the opcode step. (No marks will be given for naming the “decode the opcode” step) Instructor: Marcel R. karam January 28, 2003 CMPS 255 Final Exam Question 4: State Machines [30 points] Implement the State Machine that is described by the following state diagram. You can use only D flip-flops and 4:1 multiplexers a- Derive the state transition table. For the sake of simplifying the marking process, please follow the QI QO X, QI+, QO0+ Z format in your table. b- Derive the next state logic equations. c- Draw the schematic diagram of the FSM, using D flip-flops and 4:1 multiplexers. Instructor: Marcel R. karam 5/12 January 28, 2003 CMPS 255 Final Exam 6/12 Instructor: Marcel R. karam January 28, 2003 CMPS 255 Final Exam Question 5: Recognizing Sequences [10 points] Give the state diagram of a Mealy type finite state machine that has one input X and two outputs Y and Z. The output Y will be | whenever the sequence 101 has been detected and the output Z will be | when the sequence 011 has been detected. These sequences can be overlapping. The operation is illustrated in the following example: X: 00110101100100111011 Y: 00000101000000000010 Z: 00010000100000010001 Instructor: Marcel R. karam TWi2 January 28, 2003 CMPS 255 Final Exam Question 6: ARC Assembly [10 points] The Fibonacci numbers up to 200 are calculated and stored in an array. The following is the java version: int({] fib = new int(20]; int a; int b = 0; int c = 1; fib[0] = b; fFibf1l] =c int i=2; while (c<200) { a=b; b=oc; c=ar+b; fibli++] = c; } Write the above code in the ARC assembly language. The table with some mnemonics and their meanings is provided below. ; ld Load a register from memory at Store a register into memory sethi | Load the 22 most significant bits of a register andece | Bitwise logical AND oree Bitwise logical OR j ornec | Bitwise logical NOR | } srl Shift right !logical) call Call subroutine jmpl “Jump and. link “(return ‘rom subroutine call) be Branch if equal _ bneg “| Branch if negative Oo 7 bes Branch on carry — —_ fbvs | Branch on overflow ba Branch always i —_ _ ie oO fie on, ~~ Instructor: Marcel R. karam 8/12 January 28, 2003 CMPS 255 Final Exam Instructor: Marcel R. karam