EECE 320 Lecture 24, Fall 2011

EECE 320 L24: Combinational Logic design Practices 1 Chehab, AUB, 2003 EECE 320 Digital Systems Design Lecture 24: Sequential Logic Design Principles Ali Chehab EECE 320 L24: Combinational Logic design Practices 2 Chehab, AUB, 2003 State-Machine Design Example AB Q1Q2Q3 00 01 11 10 Z 000 100 100 101 101 0 100 110 110 101 101 0 101 100 100 111 111 0 110 110 110 111 101 1 111 100 110 111 111 1 D1D2D3 Synthesis Using D Flip-Flops - Minimal Risk Approach EECE 320 L24: Combinational Logic design Practices 3 Chehab, AUB, 2003 State-Machine Design Example AB Q1Q2Q3 00 01 11 10 Z 000 100 100 101 101 0 100 110 110 101 101 0 101 100 100 111 111 0 110 110 110 111 101 1 111 100 110 111 111 1 D1D2D3 D1 = Q1 + Q2’.Q3’ D2 = Q1.Q3’.A’ + Q1.Q3.A + Q1.Q2.B D3 = Q1.A + Q2’.Q3’.A Z = Q1.Q2.Q3’ + Q1.Q2.Q3 = Q1.Q2 Synthesis Using D Flip-Flops - Minimal Risk Approach EECE 320 L24: Combinational Logic design Practices 4 Chehab, AUB, 2003 State-Machine Design Example  Synthesis Using D Flip-Flops - Minimal Cost Approach AB Q1Q2Q3 00 01 11 10 Z 000 100 100 101 101 0 100 110 110 101 101 0 101 100 100 111 111 0 110 110 110 111 101 1 111 100 110 111 111 1 D1D2D3 EECE 320 L24: Combinational Logic design Practices 5 Chehab, AUB, 2003 State-Machine Design Example  Synthesis Using D Flip-Flops - Minimal Cost Approach AB Q1Q2Q3 00 01 11 10 Z 000 100 100 101 101 0 100 110 110 101 101 0 101 100 100 111 111 0 110 110 110 111 101 1 111 100 110 111 111 1 D1D2D3 D1 = 1 D2 = Q1.Q3’.A’ + Q3.A + Q2.B D3 = A Z = Q2 EECE 320 L24: Combinational Logic design Practices 6 Chehab, AUB, 2003 State-Machine Design Example  Synthesis Using D Flip-Flops - Minimal Cost Approach EECE 320 L24: Combinational Logic design Practices 7 Chehab, AUB, 2003 1’s Counting Machine: Design Example  Design a clocked synchronous state machine with 2 inputs, X and Y, and 1 output Z.  Z = 1 if number of 1 inputs on X and Y is a multiple of 4. XY Meaning S 00 01 11 10 Z Got zero 1’s (mod 4) S0 S0 S1 S2 S1 1 Got one 1’s (mod 4) S1 S1 S2 S3 S2 0 Got two 1’s (mod 4) S2 S2 S3 S0 S3 0 Got three 1’s (mod 4) S3 S3 S0 S1 S0 0 S* EECE 320 L24: Combinational Logic design Practices 8 Chehab, AUB, 2003 1’s Counting Machine: Design Example XY Q1Q2 00 01 11 10 Z 00 00 01 11 01 1 01 01 11 10 11 0 11 11 10 00 10 0 10 10 00 01 00 0 Q1*Q2* or D1D2 D1 = Q2.X’.Y + Q1.X.Y + Q1.X’.Y’ + Q2.X.Y’ D2 = Q1’.X’.Y + Q1’.X.Y’ + Q2.X’.Y’ + Q2’.X.Y Z = Q1’.Q2’